Semiconductor memory devices may be categorized, for example, as either volatile memory devices or nonvolatile memory devices. Volatile memory devices may lose their stored data when their power supplies are interrupted, whereas nonvolatile memory devices may retain their stored data even when their power supplies are interrupted. Accordingly, nonvolatile memory devices have been widely used in memory cards such as, for example, smart cards and mobile telecommunication systems such as, for example, cellular phones.
Nonvolatile memory devices may be classified, for example, as either a NAND-type flash memory device or a NOR-type flash memory device. A NOR-type flash memory device may have a relatively large sensing margin as compared to the NAND-type flash memory device. In addition, a unit cell of the NOR-type flash memory device may be composed of only one cell transistor. However, there may be certain difficulties associated with a NOR-type flash memory device. For example, when any one of memory cells of the NOR-type flash memory device is over-erased and an adjacent cell that shares a bit line of the over-erased cell has a programmed state, it may be difficult to selectively read out the data stored in the programmed cell. This is because even though the programmed cell is selected in a read mode, an undesirable leakage current may flow through the over-erased cell and the bit line connected thereto.
To solve the above-mentioned over-erasure difficulty, a two-transistor memory cell including one cell transistor and one selection transistor that are serially connected to each other has been employed with a NOR type flash memory device. The two-transistor memory cell may be programmed using a channel hot electron (CHE) injection phenomenon. Nevertheless, the above-mentioned NOR-type flash memory device may still require a large program current, and thus may also have a high power consumption.
Consequently, a three-transistor memory cell has been proposed to overcome the above-mentioned difficulties (e.g., over erasure and high power consumption) of the one-transistor memory cell and the two-transistor memory cell. The three-transistor memory cell has been widely utilized in flash memory devices of smart cards, which may selectively erase a single byte composed of 8 memory cells that are connected to 8 adjacent bit lines, respectively.
An example of the three-transistor memory cell is described in U.S. Pat. No. 6,680,230 to Arai et al., entitled “Semiconductor Device and Method of Fabricating the Same”. According to Arai et al., the three-transistor memory cell includes two selection transistors and one cell transistor formed between the selection transistors, and gate patterns of the selection transistors and cell transistor are formed using conventional photolithography and etching processes. Thus, distances between the selection gate patterns and the cell gate pattern may be controlled by the resolution limit of the photolithography process. As a result, there may be a limitation in reducing the area that the three-transistor memory cell occupies. In other words, there may be a limitation in improving the integration density of a flash memory device employing the three-transistor memory cell.
Furthermore, according to Arai et al., the selection gate patterns have the same stacked gate structure as the cell gate pattern. In other words, each of the cell gate patterns includes a floating gate and a word line (or a control gate electrode) that are sequentially stacked, and each of the selection gate patterns includes a main gate electrode (or a selection line) and a dummy gate electrode, which correspond to the floating gate and the word line, respectively. Thus, a butting contact technique may be required to electrically connect the main gate electrode to the dummy gate electrode, and an additional area for the butting contact may also be required.
Thus, there is a need for a nonvolatile memory device having an improved integration density in comparison to conventional nonvolatile memory devices and for a method of forming the same.